Cross-Layer Self-Adaptivity for Ultra-Low Power Responsive IoT Devices: Analysing Task Hierarchy and Task Adaptivity at Different Optimisation Levels

In the past 50 years, the world has seen a steady rise in devices which are connected to the internet. This rise in connected devices has led to a vision where every physical device is connected to the world, called the Internet-of-Things. The vision enables many opportunities across different application domains: smart healthcare, smart agriculture, smart homes,... However, to bring this vision to fruition, those devices need to fulfil three important requirements: they need to sense the world, to connect to all other physical devices, and to disappear from the foreground. Those three requirements currently challenge the electronic designs of these devices. The first difficulty is that large amounts of information-sparse sensor data needs to be processed. Secondly, the devices need to operate autonomously for their complete lifetime, limiting their energy to that of a single battery and this across multiple years. Even though the energy efficiency of electronics improves every year, the demand for extra compute power to locally process the large data streams currently limits their battery lifetime. Therefore, new hardware and software architectures are needed, allowing energy to be saved at the system level. This dissertation discusses two newly developed design paradigms which cope with the two previously described obstacles: task hierarchy} and task adaptivity. In task hierarchical systems, the complex task required by the application is preceded by a cascade of increasingly complex and power hungry subtasks. Only when a subtask is fulfilled, the next task in the chain is activated, saving the power consumption of the more complex tasks.In task adaptive systems, the hardware and classification model of a task scale with the environmental complexity, i.e. current operating conditions. In this way, only under worst case conditions the system uses its full compute power. These two design methodologies should be used throughout the system design, which consists of three different design levels: circuit level, chip level and system level. This dissertation shows efficiency gains of up to a factor 10 when task-hierarchy and task-adaptivity are used in each of those three design levels through proof-of-principle chips and a PCB implementation.status: publishe