Surface and interface cleaning and passivation of III-V semiconductor materials

The ultimate scaling limit of the Si-based complementary metal-oxide semiconductor (CMOS) technology is rapidly approaching, as evidenced by the International Technology Roadmap for Semiconductors (ITRS). This has led to renewed interest in the implementation of III-V compound semiconductors due to their favorable charge carrier transport properties. Due to economic reasons, these III-V materials will have to be introduced on a Si platform wafer which has led to new device structures such as implant free quantum well high electron mobility transistors (QW-HEMT) and fin shaped field-effect transistor (Fin-FET) to replace the classicalplanar MOSFET devices. The manufacturing of transistors consists of different processing steps involving multiple exposures to chemical preparation steps to obtain controlled etching or highly selective removal of undesired layers and contaminants. A clean and stoichiometric surface is hereby critical since an interface with high defect density will lead todevice deterioration. In general, III-V materials are poorly passivatedcompared to Si and form complex and chemically inhomogeneous and unstable oxides. This thesis will focus on the surface preparation challenges which are classified into etching of III-V surfaces at the nanometer scale, removal of III-V oxides and passivation of III-V surfaces. A controlled etching process for III-V surfaces with limited substrate loss and no roughness is required in order to remove contamination and surface defects. In order to determine the etch rates of III-V materials at the sub nanometer scale, we developed a procedure by using inductively coupled plasma mass spectrometry (ICP-MS). For this work, we focused on the determination of gallium, arsenic and indium in chemical mixtures. Subsequently, we have used this technique to develop an etching process for InP surfaces, as these layers can play an important role as buffer layer or advanced channel material. An oxide formation / oxide dissolution (OFOD) model was proposed in order to prevent the formation of toxic PH3 with a target etch rate in the nm/min range. However, it was shown that this OFOD etching process results in oxide remaining at thesurface. In general, III-V oxides are complex and chemically inhomogeneous therefore a subsequent oxide removal step is essential. It was demonstrated that InP is not etched while the oxide can selectively be removed. In order to obtain a more profound surface analysis, we studied the InP surface after different wet treatments with s ynchrotron radiation photoemission spectroscopy (SRPES). It was demonstrated that although most of the oxides were removed by both HCl and H2SO4 solutions, the surface is not fully free of oxide. It was found that this oxide is not removed during ALD of Al2O3 and the obtained InP/Al2O3 interface contains a large density of defect states. This indicates that a passivation step is required to reduce surface defects and preve nt re-oxidation. Therefore, we studied the InP surface after immersion into (NH4)2S solutions. The analyzed surfaces were not completely oxide free, and we speculate that the sulfur possibly avoids the InP surface oxidation but the sulfur surface density may be insufficient to prevent pinholes. Additionally, the (NH4)2S solution immersion might lead to the hydrolysis of sulfur. We have studied (NH4)2S vapor exposure as alternative method for the passivation of InP surfaces. It was found that the bandgap emission significantly increases after this (NH4)2S vapor exposure, indicating this treatment is passivating the defective states at the surface. The final part of this thesis will focus on the passivation of GaAs, which became more relevant as channel material over the scope of time. We studied the use of self-assembled monolayers (SAMs) as passivation technique. The alkyl chain improves the stability towards air exposure after deposition and is thermally cracked down prior to the ALD temperature (300°C). It was found that the Fermi level was unpinned after the ALD of Al2O3 onto SAMs treated III-V surfaces. It can therefore be stated that the use of self-assembled monolayers shows promising results as an alternative passivation route of III-V semiconductors.nrpages: 159status: publishe