Efficient Hardware Implementations of Cryptographic Primitives (Efficiënte hardware implementaties van cryptografische primitieven)

Society is undergoing a paradigm shift where the Information and Communication Technology (ICT) revolution goes along with the evolution of the humankind. The Internet is all around us and plays a crucial role in our ability to communicate. We often distribute our personal and other classified information using the benefits of the global network. Our demands to conceal confidential data are therefore being strongly manifested and become very important. By ensuring the objectives of information security, such as confidentiality, data integrity, entity authentication, non-repudiation, and many more, cryptography provides a natural solution to the issue of data protection.The ICT revolution has driven cryptography from the art of secret writing into a multidisciplinary scientific study of techniques for securing digital information. While providing aspects of information security, cryptography uses complex mathematical objects and often represents a bottleneck in hardware and software implementations. The research presented in this thesis deals with efficient hardware implementations of cryptographic primitives.The first part of the thesis is devoted to efficient implementations of finite field arithmetic, with the application in public-key cryptography. Our focus on state of the art algorithms for efficient modular multiplication eventually leads to the introduction of several sets of moduli for which the modular multiplication performs faster. Furthermore, by combining several existing algorithms, we propose the tripartite modular multiplication, a novel method that reduces the computational complexity of modular multiplication and increases the potential of parallel processing.The second part of the thesis presents techniques for high-throughput hardware implementations of cryptographic hash functions. Our hardware implementation of the RIPEMD-160 hash algorithm represents the fastest implementation of this algorithm reported in the literature. As a contribution to the SHA-3 competition launched by the National Institute of Standards and Technology (NIST), we define a standard testing framework for a comprehensive hardware evaluation of fourteen second-round SHA-3 candidates.Finally, we discuss recent advances in lightweight cryptography. Our contribution to this field is KATAN & KTANTAN a family of small, very efficient, hardware- oriented block ciphers. The family comprises six designs, the smallest of which has size of only 462 NAND gate equivalences (GE). KATAN & KTANTAN is the smallest family of cryptographic primitives suitable for the current CMOS technology reported in the literature.status: publishe