International audienceTransient voltage overshoots of a high voltage (20 V) ESD clamp based on bipolar transistors in a smart power technology are studied using different TLP pulse conditions (rise time, voltage amplitude). The physical mechanisms involved during the ESD clamp turn-on are thoroughly analyzed by the mean of TCAD simulations, allowing the definition of a set of design guidelines for the overshoot reduction
In this work we present new ESD protections structures, compatible with the in BCD5 smart power tech...
System-efficient electrostatic discharge (ESD) design (SEED) models of a diode and transient voltage...
The power-off and power-on transient performance of power-rail electrostatic discharge (ESD) clamp c...
International audienceTransient voltage overshoots of a high voltage (20 V) ESD clamp based on bipol...
A Transient safe operating area (TSOA) definition for ESD applications is introduced. Within this co...
The research work presented in this thesis is aimed to analyze and optimize the triggering behavior ...
In this work we present results concerning ESD protection structures for 20 V and 40 V power supply ...
In this work high-voltage Electrostatic discharge (ESD) PNPs are studied through TCAD simulation and...
This work describes, how the very fast transmission line pulsing (VFTLP)-technique can be used to ch...
Abstract—The holding voltage of the high-voltage devices in snapback breakdown condition has been fo...
Electrostatic discharge (ESD) failures in high-speed integrated circuits (ICs) cause critical reliab...
This paper describes a test method which allows the investigation of the transient switching behavio...
A novel power-rail ESD clamp circuit with a small time constant to achieve a longer turn-on time is ...
Double snapback phenomena in transient power-rail ESD clamp circuits are reported in this paper. By ...
International audienceA comprehensive study of the limitations of vf-TLP setup for transient measure...
In this work we present new ESD protections structures, compatible with the in BCD5 smart power tech...
System-efficient electrostatic discharge (ESD) design (SEED) models of a diode and transient voltage...
The power-off and power-on transient performance of power-rail electrostatic discharge (ESD) clamp c...
International audienceTransient voltage overshoots of a high voltage (20 V) ESD clamp based on bipol...
A Transient safe operating area (TSOA) definition for ESD applications is introduced. Within this co...
The research work presented in this thesis is aimed to analyze and optimize the triggering behavior ...
In this work we present results concerning ESD protection structures for 20 V and 40 V power supply ...
In this work high-voltage Electrostatic discharge (ESD) PNPs are studied through TCAD simulation and...
This work describes, how the very fast transmission line pulsing (VFTLP)-technique can be used to ch...
Abstract—The holding voltage of the high-voltage devices in snapback breakdown condition has been fo...
Electrostatic discharge (ESD) failures in high-speed integrated circuits (ICs) cause critical reliab...
This paper describes a test method which allows the investigation of the transient switching behavio...
A novel power-rail ESD clamp circuit with a small time constant to achieve a longer turn-on time is ...
Double snapback phenomena in transient power-rail ESD clamp circuits are reported in this paper. By ...
International audienceA comprehensive study of the limitations of vf-TLP setup for transient measure...
In this work we present new ESD protections structures, compatible with the in BCD5 smart power tech...
System-efficient electrostatic discharge (ESD) design (SEED) models of a diode and transient voltage...
The power-off and power-on transient performance of power-rail electrostatic discharge (ESD) clamp c...