Modern digital systems move and process vast amounts of data. Designing good ASIC architectures for these systems requires e cient data routing and storage. A high-level synthesis (HLS) system must consider spatial aspects of the architecture it synthesizes to achieve this. In this paper, we discuss using oorplanning information in the main HLS ow. Our HLS system, Midas, incorporates oorplanning and formulates HLS using a data-transfer model. Midas synthesizes an architecture whose data storage and transfer subsystems are spatially integrated with its execution unit. Midas also generates a high-level oorplan for the architecture, which contains the shapes and coordinates of its components and routing channel speci cations for its buses. Our...
System-level design has a disadvantage in not knowing important aspects about the final layout. This...
High-level synthesis (HLS) tools have greatly improved the development efficiency of FPGA accelerat...
We present High-level Library Mapping (HLLM), a technique that permits reuse of complex RT-level dat...
We present a new model for formulating the classic HLS subproblems: scheduling, allocation, and bind...
This paper proposes a novel methodology for automated data-path synthesis of such circuits and outli...
With the increasing cost of global communication on-chip, high-performance designs for data-intensiv...
Specialized accelerators can exploit spatial parallelism on both operations and data thanks to a ded...
High level synthesis means going from an functional specification of a digits-system at the algorith...
We describe High-level Library Mapping (HLLM), a technique that permits reuse of complex RT-level da...
International audienceHigh-level synthesis (HLS) currently seems to be an interesting process to red...
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is ...
Digital systems continue growing in complexity, but the design and verification productivity has not...
[[abstract]]The authors propose a novel layout area model for quality measures in high-level synthes...
International audienceThis paper presents a High Level Synthesis (HLS) method for specialized coproc...
Spatial computing architectures promise a major stride in performance and energy efficiency over the...
System-level design has a disadvantage in not knowing important aspects about the final layout. This...
High-level synthesis (HLS) tools have greatly improved the development efficiency of FPGA accelerat...
We present High-level Library Mapping (HLLM), a technique that permits reuse of complex RT-level dat...
We present a new model for formulating the classic HLS subproblems: scheduling, allocation, and bind...
This paper proposes a novel methodology for automated data-path synthesis of such circuits and outli...
With the increasing cost of global communication on-chip, high-performance designs for data-intensiv...
Specialized accelerators can exploit spatial parallelism on both operations and data thanks to a ded...
High level synthesis means going from an functional specification of a digits-system at the algorith...
We describe High-level Library Mapping (HLLM), a technique that permits reuse of complex RT-level da...
International audienceHigh-level synthesis (HLS) currently seems to be an interesting process to red...
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is ...
Digital systems continue growing in complexity, but the design and verification productivity has not...
[[abstract]]The authors propose a novel layout area model for quality measures in high-level synthes...
International audienceThis paper presents a High Level Synthesis (HLS) method for specialized coproc...
Spatial computing architectures promise a major stride in performance and energy efficiency over the...
System-level design has a disadvantage in not knowing important aspects about the final layout. This...
High-level synthesis (HLS) tools have greatly improved the development efficiency of FPGA accelerat...
We present High-level Library Mapping (HLLM), a technique that permits reuse of complex RT-level dat...