Versatile Imaging architecture based on a System On Chip

Abstract. In this paper, a novel architecture dedicated to image processing is presented. The most original aspect of the approach is the use of a System On Chip implemented in a FPGA. We show the main advantages of such a system based on a CMOS imaging device and a programmable chip. With its structure, the system proposes a high degree of versatility and allows the implementation of parallel image processing algorithms. As a result, a Window Of Interest (WOI) module is detailed. Architecture overview In this paper, an embedded imaging architecture based on a combination of CMOS imager and FPGA is proposed. Traditionally, the image is transduced by a sensor (camera), converted and stored (image grabber) and processed on a host computer[2]. In our approach, all early-vision 1 processing is performed in the sensor. This kind of sensor composed of a camera and an embedded processing unit, is currently called a smart sensor. The architecture presented in this paper can be considered as a development platform for a smart image sensor based on a System-On-Chip approach