Architectural Exploration and Optimization of Local Memory in Embedded Systems*

Embedded processor-based systems allow for the tai-Zoring of the on-chip memory architecture based on appiicaiion-specific requirements. We present an analytical strategy for exploring the on-chip memory archifecture for a given application, based on a memory performance esti-mation scheme. The anaiyrical technique has fhe important advantage of enabling a fast evaluafion of candidate mem-ory architectures in the early stages of system design. Our experiments demonslrare that our estimations closelyfo&w the actual simrrlared performunce, at significantly reduced run times. 1