In recent years, Globally Asynchronous Locally Synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever increasing microprocessor energy consumption. In this work, we propose two on-line algorithms for adjusting dynamically, and independently, the voltage and frequency of the front-end and back-end domains of a novel two-domain microprocessor. We evaluate our mechanisms for both internal and external voltage regulators, and we present optimal dynamic voltage scaling results for the proposed microarchitecture. Our schemes achieve average improvement of 12 % of the energy-delay 2 metric, when using internal voltage regulators
We propose and evaluate two new and independently-applicable techniques, process-driven voltage scal...
Limit studies on Dynamic Voltage and Frequency Scaling (DVFS) provide apparently contradictory concl...
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew...
Microprocessors are traditionally designed to provide "best overall" performance across a ...
In this paper, we present a clustered, multiple-clock domain (CMCD) microarchitecture that combines ...
Multiple clock domains is one solution to the increasing problem of propagating the clock signal acr...
As microprocessor power has been growing exponentially ever since the microprocessor industry starte...
The reduction of energy consumption in micro-processors can be accomplished without impacting the pe...
Improving the energy efficiency of processor systems-on-chip (SoCs) is key to improving the performa...
As the core count in processor chips grows, so do the on-die, shared resources such as on-chip commu...
With chip temperature being a major hurdle in microprocessor design, techniques to recover the perfo...
With power-related concerns becoming dominant aspects of hardware and software design, significant r...
Dynamic voltage and frequency scaling (DVFS) mechanisms have been developed for years to decrease th...
(GALS) system with dynamic voltage and frequency scaling can use the slowest frequency possible to a...
Cornell UniversityIthaca, NY 14853, U.S.A. Abstract We present a simple rate matching-based mechanis...
We propose and evaluate two new and independently-applicable techniques, process-driven voltage scal...
Limit studies on Dynamic Voltage and Frequency Scaling (DVFS) provide apparently contradictory concl...
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew...
Microprocessors are traditionally designed to provide "best overall" performance across a ...
In this paper, we present a clustered, multiple-clock domain (CMCD) microarchitecture that combines ...
Multiple clock domains is one solution to the increasing problem of propagating the clock signal acr...
As microprocessor power has been growing exponentially ever since the microprocessor industry starte...
The reduction of energy consumption in micro-processors can be accomplished without impacting the pe...
Improving the energy efficiency of processor systems-on-chip (SoCs) is key to improving the performa...
As the core count in processor chips grows, so do the on-die, shared resources such as on-chip commu...
With chip temperature being a major hurdle in microprocessor design, techniques to recover the perfo...
With power-related concerns becoming dominant aspects of hardware and software design, significant r...
Dynamic voltage and frequency scaling (DVFS) mechanisms have been developed for years to decrease th...
(GALS) system with dynamic voltage and frequency scaling can use the slowest frequency possible to a...
Cornell UniversityIthaca, NY 14853, U.S.A. Abstract We present a simple rate matching-based mechanis...
We propose and evaluate two new and independently-applicable techniques, process-driven voltage scal...
Limit studies on Dynamic Voltage and Frequency Scaling (DVFS) provide apparently contradictory concl...
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew...