A Survey on Helper Threads and Their Implementations

This survey covers the general idea behind helper threads and the major ways in which they are implemented. The first section covers parallel helper threads and the issues crucial to their role in improving performance. The following sections cover the implementations of parallel helper threads, focusing on SMT processor based implementations and adapted superscalar processor based implementation with the advantages and disadvantages each method provides. Last, the idea of a sequential helper thread is introduced as a context that executes while the main thread has limited ILP. In the remaining section of the paper, sequential helper thread properties and the details of its implementation are covered. Current microprocessors provide substantial resources to exploit instruction level parallelism (ILP) and high instruction throughput. However, data and control dependences cause a much lower than ideal instructions per cycle (IPC). With contro