Time-Triggered Protocol for the bus and static task scheduling for the CPU are widely used in safety-critical distributed embedded systems. Researchers have presented efficient heuristic algorithms to jointly optimize static task and bus access schedules. In this paper, we use the model checker SPIN to provide a flexible and configurable technique for obtaining provably optimal solutions, and evaluate its performance tradeoffs compared to heuristic algorithms
We report on the use of the SPIN model checker for both the verification of a process control progra...
Optimal Design of Distributed Control and Embedded Systems focuses on the design of special control ...
Our goal is to automatically obtain a distributed and fault-tolerant embedded system: distributed be...
Time-Triggered Protocol for the bus and static task scheduling for the CPU are widely used in safety...
We consider the task model of periodic tasks running on a network of processor nodes connected by a ...
We consider the task model of periodic tasks running on a network of processor nodes connected by a ...
Time-triggered protocol (TTP) is a time-division multiple access (TDMA)-based bus protocol designed ...
In this paper we report on the work we performed to extend the logic model checker SPIN with built-i...
Day by day, we are witnessing a considerable increase in number and range of applications which enta...
It is often argued that time-triggered (TT) architectures are the most suitable basis for safety-rel...
Support for exclusive access to shared (global) resources is instrumental in the context of embedded...
Predictable interprocessor synchronization and fast interrupt response are important for real-time s...
With the proliferation of multicore platforms, the embedded systems world has shifted more and more ...
Abstract — This paper describes a novel two-stage search technique which is intended to support the ...
This paper describes a novel two-stage search technique which is intended to support the configurati...
We report on the use of the SPIN model checker for both the verification of a process control progra...
Optimal Design of Distributed Control and Embedded Systems focuses on the design of special control ...
Our goal is to automatically obtain a distributed and fault-tolerant embedded system: distributed be...
Time-Triggered Protocol for the bus and static task scheduling for the CPU are widely used in safety...
We consider the task model of periodic tasks running on a network of processor nodes connected by a ...
We consider the task model of periodic tasks running on a network of processor nodes connected by a ...
Time-triggered protocol (TTP) is a time-division multiple access (TDMA)-based bus protocol designed ...
In this paper we report on the work we performed to extend the logic model checker SPIN with built-i...
Day by day, we are witnessing a considerable increase in number and range of applications which enta...
It is often argued that time-triggered (TT) architectures are the most suitable basis for safety-rel...
Support for exclusive access to shared (global) resources is instrumental in the context of embedded...
Predictable interprocessor synchronization and fast interrupt response are important for real-time s...
With the proliferation of multicore platforms, the embedded systems world has shifted more and more ...
Abstract — This paper describes a novel two-stage search technique which is intended to support the ...
This paper describes a novel two-stage search technique which is intended to support the configurati...
We report on the use of the SPIN model checker for both the verification of a process control progra...
Optimal Design of Distributed Control and Embedded Systems focuses on the design of special control ...
Our goal is to automatically obtain a distributed and fault-tolerant embedded system: distributed be...