The interplay of real-time and probability is crucial to the correctness of the IEEE 1394 FireWire root contention protocol. We present a formal veri cation of the protocol using probabilistic model checking. Rather than analyze the functional aspects of the protocol, by asking such questions as \will a leader be elected?", we focus on the protocol's performance, by asking the question \how certain are we that a leader will be elected suciently quickly?" Probabilistic timed automata are used to formally model and verify the protocol against properties which require that a leader is elected before a deadline with a certain probability. We use techniques such as abstraction, reachability analysis, and integer-time semantics to...
AbstractProbabilistic timed automata are timed automata extended with discrete probability distribut...
Abstract—The international standard IEEE 802.15.4 defines low-rate wireless personal area networks, ...
Probabilistic model checking is a formal verification technique for the analysis of sys-tems that ex...
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root cont...
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root cont...
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root cont...
AbstractWe report on the automatic verification of timed probabilistic properties of the IEEE 1394 r...
Probabilistic timed automata, a variant of timed automata extended with discrete probability distrib...
Probabilistic model checking is a formal verification technique for the analysis of systems that exh...
Abstract Probabilistic timed automata (PTAs) are a formalism for modelling systems whose behaviour i...
We present an abstract model of the leader election protocol used in the IEEE 1394 High Performance ...
Probability features increasingly often in software and hardware systems: it is used in distributed ...
Probabilistic model checking is a formal verification technique for systems that exhibit stochastic ...
Probabilistic timed automata are timed automata extended with discrete probability distributions, an...
Probabilistic timed automata are timed automata extended with discrete probabil-ity distributions, a...
AbstractProbabilistic timed automata are timed automata extended with discrete probability distribut...
Abstract—The international standard IEEE 802.15.4 defines low-rate wireless personal area networks, ...
Probabilistic model checking is a formal verification technique for the analysis of sys-tems that ex...
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root cont...
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root cont...
We report on the automatic verification of timed probabilistic properties of the IEEE 1394 root cont...
AbstractWe report on the automatic verification of timed probabilistic properties of the IEEE 1394 r...
Probabilistic timed automata, a variant of timed automata extended with discrete probability distrib...
Probabilistic model checking is a formal verification technique for the analysis of systems that exh...
Abstract Probabilistic timed automata (PTAs) are a formalism for modelling systems whose behaviour i...
We present an abstract model of the leader election protocol used in the IEEE 1394 High Performance ...
Probability features increasingly often in software and hardware systems: it is used in distributed ...
Probabilistic model checking is a formal verification technique for systems that exhibit stochastic ...
Probabilistic timed automata are timed automata extended with discrete probability distributions, an...
Probabilistic timed automata are timed automata extended with discrete probabil-ity distributions, a...
AbstractProbabilistic timed automata are timed automata extended with discrete probability distribut...
Abstract—The international standard IEEE 802.15.4 defines low-rate wireless personal area networks, ...
Probabilistic model checking is a formal verification technique for the analysis of sys-tems that ex...