Evaluating Titanium SPMD programs on the Tera MTA

Coarse grained threading, such as in the SPMD model of parallel programming, has been shown to be an effective and well-understood programming model for performance-oriented languages such as Titanium [2]. Some parallel architectures, however, such as the Tera MTA, prefer light-weight threading in order to achieve high performance. This paper describes a port of the Titanium compiler to the Tera MTA and the mapping of its SPMD constructs to a more dynamic, threaded model. The Titanium language was enhanced to allow the programmer to specify non-SPMD-style loop-level parallelism. To evaluate the platform and language interface, a few Titanium applications were modified to take advantage of the language changes and were measured for performance. They show that thread overhead and synchronization may still be a limiting factor for scaling SPMD programs. With automatically detected loop-level parallelism, associating threads with a specific processor can greatly reduce the thread overhead for some applications. Finally, the data suggests that having only-coarse grained parallelism may not keep the Tera processors busy so parallelizing compiler optimizations are a necessity.