In this paper we address a resource–constrained optimization problem for behavioral descriptions containing conditionals. In high–level synthesis of ASICs or in code generation for ASIPs, most methods use greedy choices in such a way that the search space is limited by the applied heuristics. For example, they might miss opportunities to optimize across basic block boundaries when treating conditional execution. We propose an approach based on local search and present a constructive method to allow unrestricted types of code motion, while keeping optimal solutions in the search space. A code–motion pruning technique is presented for cost functions optimizing schedule lengths. A technique for treating concurrent flows of execution is also de...
Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality c...
Emerging design problems are prompting the use of code motion and speculation in high–level synthesi...
An instruction scheduler utilizes code reordering techniques for generating schedules in which instr...
In this paper we address a resource–constrained optimiza-tion problem for behavioral descriptions co...
In this paper we address a resource-constrained optimization problem for behavioral descriptions con...
In the high-level synthesis of ASICs or in the code generation for ASIPs, the presence of conditiona...
Emerging design problems are prompting the use of code motion and speculative execution in high-leve...
The automated synthesis of a design from its behavioral description, known as high level synthesis, ...
Code motion is well-known as a powerful technique for the optimization of sequential programs. It im...
We introduce a code transformation technique "conditional speculation" that speculates operations by...
In code generation, instruction selection chooses processor instructions to implement a program unde...
this paper, we emphasize the practicality of lazy code motion by giving explicit directions for its ...
International audienceAs hardware designs get increasingly complex and time-to-market constraints ge...
Heuristics are widely used for solving computational intractable synthesis problems. However, until ...
We introduce the concept of future values. Using future values it is possible to represent programs ...
Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality c...
Emerging design problems are prompting the use of code motion and speculation in high–level synthesi...
An instruction scheduler utilizes code reordering techniques for generating schedules in which instr...
In this paper we address a resource–constrained optimiza-tion problem for behavioral descriptions co...
In this paper we address a resource-constrained optimization problem for behavioral descriptions con...
In the high-level synthesis of ASICs or in the code generation for ASIPs, the presence of conditiona...
Emerging design problems are prompting the use of code motion and speculative execution in high-leve...
The automated synthesis of a design from its behavioral description, known as high level synthesis, ...
Code motion is well-known as a powerful technique for the optimization of sequential programs. It im...
We introduce a code transformation technique "conditional speculation" that speculates operations by...
In code generation, instruction selection chooses processor instructions to implement a program unde...
this paper, we emphasize the practicality of lazy code motion by giving explicit directions for its ...
International audienceAs hardware designs get increasingly complex and time-to-market constraints ge...
Heuristics are widely used for solving computational intractable synthesis problems. However, until ...
We introduce the concept of future values. Using future values it is possible to represent programs ...
Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality c...
Emerging design problems are prompting the use of code motion and speculation in high–level synthesi...
An instruction scheduler utilizes code reordering techniques for generating schedules in which instr...