AN AREA EFFICIENT, SCALABLE, HIGH SPEED SERIAL FULL MESH SWITCH FABRIC DESIGN FOR FPGA

The integration into FPGA of high-speed serial IO blocks enables the creation of flexible switching solutions that scale to meet customer requirements in a manner not costeffective in standard products. This paper describes a Mesh Fabric switch architecture available for the Xilinx Virtex-II Pro family of devices. The design provides a configurable mesh interconnect for line cards that can be directly connected to a back plane at up to 10 Gbps per serial link. Parameters for the design include fabric cell sizes of between 40 and 256 bytes; 1-16 priority levels, with per-priority flow control; and from 4-256 mesh ports. The ability to partition the design across multiple devices of differing size provides flexible FPGA resources for additional logic. The advantages of mesh fabrics over other solutions are discussed, and the overall architecture, features, and performance of the solution are described