Checkpointed Early Resource Recycling (Cherry) is a recently-proposed micro-architectural technique that aims at improving critical resource utilization by performing aggressive resource recycling decoupled from instruction retirement, using a checkpoint/rollback mechanism to recover from occasional incorrect execution. In this paper, we explore correctness and performance issues that arise when Cherryenabled processors are used in chip multiprocessor architectures. We propose mechanisms to address cache coherence, memory consistency, and forward progress issues in such environments. We also provide quantitative insight on the performance impact of the Cherry mechanism on parallel processing.
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
The unpredictable nature of modern workloads, characterized by frequent branches and control transfe...
The memory consistency model of a shared-memory multiprocessor determines the extent to which memory...
Large instruction window processors achieve high performance by exposing large amounts of instructio...
Abstract. Modern processors use speculative execution to improve performance. However, speculative e...
Shared-memory multiprocessors built from commodity microprocessors are being increasingly used to pr...
International audienceFailures are increasingly threatening the efficiency of HPC systems, and curre...
International audienceInput/output (I/O) from various sources often contend for scarcely available b...
Προπτυχιακή Διατριβή που υποβλήθηκε στη σχολή ΗΜΜΥ του Πολ. Κρήτης για την πλήρωση προϋποθέσεων λήψη...
Exploitation of parallelism has for decades been central to the pursuit of computing performance. Th...
Nowadays, a good multiprocessor system design has to deal with many drawbacks in order to achieve a ...
?Signatures are on le in the Graduate School. iii Chip multiprocessors (CMPs) are becoming a popular...
This thesis examines the feasibility of applying compile-time information to assist in rollback reco...
The predictable CPU architectures that run hard real-time tasks must be executed with isolation in o...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
The unpredictable nature of modern workloads, characterized by frequent branches and control transfe...
The memory consistency model of a shared-memory multiprocessor determines the extent to which memory...
Large instruction window processors achieve high performance by exposing large amounts of instructio...
Abstract. Modern processors use speculative execution to improve performance. However, speculative e...
Shared-memory multiprocessors built from commodity microprocessors are being increasingly used to pr...
International audienceFailures are increasingly threatening the efficiency of HPC systems, and curre...
International audienceInput/output (I/O) from various sources often contend for scarcely available b...
Προπτυχιακή Διατριβή που υποβλήθηκε στη σχολή ΗΜΜΥ του Πολ. Κρήτης για την πλήρωση προϋποθέσεων λήψη...
Exploitation of parallelism has for decades been central to the pursuit of computing performance. Th...
Nowadays, a good multiprocessor system design has to deal with many drawbacks in order to achieve a ...
?Signatures are on le in the Graduate School. iii Chip multiprocessors (CMPs) are becoming a popular...
This thesis examines the feasibility of applying compile-time information to assist in rollback reco...
The predictable CPU architectures that run hard real-time tasks must be executed with isolation in o...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
Fault-tolerance is due to the semiconductor technology development important, not only for safety-cr...
The unpredictable nature of modern workloads, characterized by frequent branches and control transfe...
The memory consistency model of a shared-memory multiprocessor determines the extent to which memory...