The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea is to bundle the 2-pin nets between block pairs, and measure the wire length bundle by bundle, instead of net by net. Previous bundling method [5] introduces a huge error which compromises the performance. We present an errorfree bundling approach which utilizes the piecewise linear wire length function of a pair of blocks. With the function implemented into a lookup table, the wire length can be computed promptly and precisely by binary search. Furthermore, we show that 3-pin nets can also be bundled, resulting in a further speedup. The effectiveness of our metho...
Techniques are described herein to allow a user (e.g., installer, electrician, inspector, etc.) to u...
Abstract — This article describes an algorithm for curvilinear detailed routing. We significantly im...
The increasing system complexity imposes high demands on computer aided design (CAD) tools for syste...
We address the classic wire-length estimation problem and propose a new statistical wire-length esti...
In this paper, the classic wire-length estimation problem is addressed and a new statistical wire-le...
ABSTRACT – We present a novel technique for estimating individual wire lengths in a given standardce...
Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing o...
A priori wirelength estimation is concerned with predicting various wirelength characteristics befor...
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken...
Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing o...
Wires have become a major source of bottleneck in current VLSI designs, and wire length prediction i...
[[abstract]]In deep submicron (DSM) era, the communication between different components is increasin...
In recent times, even small improvements in performance and power are seen as huge wins in digital i...
This paper presents an efficient approach to perform global interconnect sizing and spacing (GISS) f...
Wirelength estimation techniques typically contain a site density function that enumerates all possi...
Techniques are described herein to allow a user (e.g., installer, electrician, inspector, etc.) to u...
Abstract — This article describes an algorithm for curvilinear detailed routing. We significantly im...
The increasing system complexity imposes high demands on computer aided design (CAD) tools for syste...
We address the classic wire-length estimation problem and propose a new statistical wire-length esti...
In this paper, the classic wire-length estimation problem is addressed and a new statistical wire-le...
ABSTRACT – We present a novel technique for estimating individual wire lengths in a given standardce...
Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing o...
A priori wirelength estimation is concerned with predicting various wirelength characteristics befor...
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken...
Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing o...
Wires have become a major source of bottleneck in current VLSI designs, and wire length prediction i...
[[abstract]]In deep submicron (DSM) era, the communication between different components is increasin...
In recent times, even small improvements in performance and power are seen as huge wins in digital i...
This paper presents an efficient approach to perform global interconnect sizing and spacing (GISS) f...
Wirelength estimation techniques typically contain a site density function that enumerates all possi...
Techniques are described herein to allow a user (e.g., installer, electrician, inspector, etc.) to u...
Abstract — This article describes an algorithm for curvilinear detailed routing. We significantly im...
The increasing system complexity imposes high demands on computer aided design (CAD) tools for syste...