Performance Analysis of Packet Forwarding on IXP2400 Network Processor Mirza Omer

Programable Network Processors(NPUs) are embedded system-on-chip multiprocessors optimized for packet processing and forwarding tasks at line speeds. To meet the demands of increasing data rates and complex network applications, current architectures of NPUs are implemented with several embedded processor cores (or microengines) to induce parallelism in packet processing tasks. In this paper we evaluate the performance of the IXP2400 Network Processor by modeling the parallelism in microengine processing. We describe an approximate solution method and aim to compare it with actual measurements. The model considers the essential entities involved in packet processing, parameters of system configurations and forwarding algorithms. We envision that this will allow users to troubleshoot performance bottlenecks in Network Processors and minimize system latency. Category: C.1.4- [Parallel Architectures][Network Processors