With the advent of deep sub-micron (DSM) era, floorplanning has become increasingly important in physical design process. In this paper we clarify a misunderstanding in using Lagrangian relaxation for the minimum area floorplanning problem. We show that the problem is not convex and its optimal solution cannot be obtained by solving its Lagrangian dual problem. We then propose a modified convex formulation and solve it using min-cost flow technique and trust region method. Experimental results under module aspect ratio bound [0.5,2.0] show that the running time of our floorplanner scales well with the problem size in MCNC benchmark. Compared with the floorplanner in [27], our floorplanner is 9.5X faster for the largest case “ami49”. It also...
Recent advances in VLSI technology have made optimization of the interconnect delay and routability ...
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms a...
[[abstract]]We consider in this paper the problem of slicing floorplan design with boundary-constrai...
ABSTRACT modules can be handled in constraint graphs efficiently. This Floorplan area minimization i...
[[abstract]]A well known approach for the floorplan area optimization problem is to first determine ...
[[abstract]]An optimal algorithm for the floorplan area optimization problem is presented. The algor...
[[abstract]]A well known approach for the floorplan are optimization problem is to first determine a...
Recently, floorplanning problems become more complex since they need to consider standard cells, mix...
Interconnect optimization has become the major concern in floorplanning. Many approaches would use s...
[[abstract]]An optimal algorithm for the VLSI floorplan area optimization problem is presented. The ...
The building blocks in a given floor-plan may have several possible physical implementations yie1din...
[[abstract]]Studies the time complexity of L. Stockmeyer's technique (1993) to solve the floorplan a...
[[abstract]]Stockmeyer in Ref. 1 presented an optimal algorithm to solve the floorplan area optimiza...
In traditional floorplanners, area minimization is an important issue. Due to the recent advances in...
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Anneal...
Recent advances in VLSI technology have made optimization of the interconnect delay and routability ...
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms a...
[[abstract]]We consider in this paper the problem of slicing floorplan design with boundary-constrai...
ABSTRACT modules can be handled in constraint graphs efficiently. This Floorplan area minimization i...
[[abstract]]A well known approach for the floorplan area optimization problem is to first determine ...
[[abstract]]An optimal algorithm for the floorplan area optimization problem is presented. The algor...
[[abstract]]A well known approach for the floorplan are optimization problem is to first determine a...
Recently, floorplanning problems become more complex since they need to consider standard cells, mix...
Interconnect optimization has become the major concern in floorplanning. Many approaches would use s...
[[abstract]]An optimal algorithm for the VLSI floorplan area optimization problem is presented. The ...
The building blocks in a given floor-plan may have several possible physical implementations yie1din...
[[abstract]]Studies the time complexity of L. Stockmeyer's technique (1993) to solve the floorplan a...
[[abstract]]Stockmeyer in Ref. 1 presented an optimal algorithm to solve the floorplan area optimiza...
In traditional floorplanners, area minimization is an important issue. Due to the recent advances in...
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Anneal...
Recent advances in VLSI technology have made optimization of the interconnect delay and routability ...
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms a...
[[abstract]]We consider in this paper the problem of slicing floorplan design with boundary-constrai...