The inaccuracy of Elmore delay [3] for interconnect delay estimation is well-documented. However it remains a popular delay measure to drive performance optimization procedures such as wire-sizing and topology construction. This paper studies the merits of incorporating \better-than-Elmore" delay measures into the optimization process. The proposed delay metrics use a table-lookup method toincorporate better load modeling and approximate the e ect of signal slew. We demonstrate that the proposed metrics exhibit a much narrower error distribution than Elmore delay, eliminating Elmore's frequent gross delay over-estimation. Finally we show the improvement in solution quality which can be had by incorporating the new metrics into...
In this paper, we study the interconnect layout optimization problem under a higher order resistance...
Abstract-We present critical-sink routing tree (CSRT) con-structions which exploit available critica...
An e#cient solution to the wire sizing problem #WSP# using the Elmore delay model is proposed. Two f...
We propose in this paper a novel approach for speeding timing clo-sure. We focus on the problem of a...
Elmore delay has been widely used to estimate the interconnect delays in the performance-driven synt...
The main challenge for developing accurate and efficient delay metrics has been the prediction of d...
In this paper, we develop a set of delay estimation models with consideration of various interconnec...
As a remarkable development of VLSI technology, a gate switching delay is reduced and a signal delay...
Due to technological scaling and high frequency circuits, fast and effective timing algorithm is a d...
With the continuous scaling down of very large scale integrated (VLSI) technologies and increased di...
Abstract — Accurate analysis of VLSI interconnects is essential to the performance-driven synthesis ...
Computation of the second order delay in RC-tree based circuits is important during the design proce...
Delay minimization methods are proposed for zero-skew routings. A delay-time estimation formula is d...
In this paper, we study the optimal wiresizing problem under the distributed Elmore delay model. We ...
Elmore delay metric is a widely used model to compute signal delays for both analog and digital circ...
In this paper, we study the interconnect layout optimization problem under a higher order resistance...
Abstract-We present critical-sink routing tree (CSRT) con-structions which exploit available critica...
An e#cient solution to the wire sizing problem #WSP# using the Elmore delay model is proposed. Two f...
We propose in this paper a novel approach for speeding timing clo-sure. We focus on the problem of a...
Elmore delay has been widely used to estimate the interconnect delays in the performance-driven synt...
The main challenge for developing accurate and efficient delay metrics has been the prediction of d...
In this paper, we develop a set of delay estimation models with consideration of various interconnec...
As a remarkable development of VLSI technology, a gate switching delay is reduced and a signal delay...
Due to technological scaling and high frequency circuits, fast and effective timing algorithm is a d...
With the continuous scaling down of very large scale integrated (VLSI) technologies and increased di...
Abstract — Accurate analysis of VLSI interconnects is essential to the performance-driven synthesis ...
Computation of the second order delay in RC-tree based circuits is important during the design proce...
Delay minimization methods are proposed for zero-skew routings. A delay-time estimation formula is d...
In this paper, we study the optimal wiresizing problem under the distributed Elmore delay model. We ...
Elmore delay metric is a widely used model to compute signal delays for both analog and digital circ...
In this paper, we study the interconnect layout optimization problem under a higher order resistance...
Abstract-We present critical-sink routing tree (CSRT) con-structions which exploit available critica...
An e#cient solution to the wire sizing problem #WSP# using the Elmore delay model is proposed. Two f...