Exploiting Fine-Grained Parallelism Through a Combination of Hardware and Software Techniques

It has been suggested that non-scientific code has very little parallelism not already exploited by existing processors. In this paper we show that contrary to this notion, there is actually a significant amount of unexploited parallelism in typical general purpose code. In order to exploit this parallelism, a combination of hardware and software techniques must be applied. We analyze three techniques: dynamic scheduling, speculative execution and basic block enlargement. We will show that indeed for narrow instruction words 1itde is to be gained by appl yi ng these techniques. However, as the number of simultaneous operations increases, it beeomes possible to achieve speedups of three to six on realistic processors.