Tapeworm II is a software-based simulation tool that evaluates the cache and TLB performance of multiple-task and operating system intensive workloads. Tapeworm resides in an OS kernel and causes a host machine’s hardware to drive simulations with kernel traps instead of with address traces, as is conventionally done. This allows Tapeworm to quickly and accurately capture complete memory referencing behavior with a limited degradation in overall system performance. This paper compares trap-driven simulation, as implemented in Tapeworm, with the more common technique of trace-driven memory simulation with respect to speed, accuracy, portability and flexibility. Results: For reasonable miss ratios, Tapeworm simulations are significantly faste...
In a trace driven simulation study, a simulation model is evaluated using a program trace as the inp...
To increase performance, modern processors employ complex techniques such as out-of-order pipelines ...
iAbstract As processor cycle times decrease, memory system performance becomes ever more critical to...
Tapeworm II is a software-based simulation tool that evaluates the cache and TLB performance of mult...
The use of trace-driven simulation in the evaluation of computer memory systems has been popular for...
Trap-driven simulation is a new approach for analyzing the performance of memory-system components s...
be difficult because of the complexity of the systems and the interdependence of the components. Thi...
Current microprocessors improve performance by exploiting instruction-level parallelism (ILP). ILP h...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction leve...
PhD ThesisCurrent microprocessors improve performance by exploiting instruction-level parallelism (I...
As the gap between processor and memory speeds continues to widen, methods for evaluating memory sys...
textMicroprocessor evaluation using detailed cycle-accurate simulation is prohibitively time-consum...
The Memory Wall continues to be a problem with modern systems design. While the steady increase in p...
166 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1992.High speed computer systems p...
Application performance on computer processors depends on a number of complex architectural and micr...
In a trace driven simulation study, a simulation model is evaluated using a program trace as the inp...
To increase performance, modern processors employ complex techniques such as out-of-order pipelines ...
iAbstract As processor cycle times decrease, memory system performance becomes ever more critical to...
Tapeworm II is a software-based simulation tool that evaluates the cache and TLB performance of mult...
The use of trace-driven simulation in the evaluation of computer memory systems has been popular for...
Trap-driven simulation is a new approach for analyzing the performance of memory-system components s...
be difficult because of the complexity of the systems and the interdependence of the components. Thi...
Current microprocessors improve performance by exploiting instruction-level parallelism (ILP). ILP h...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction leve...
PhD ThesisCurrent microprocessors improve performance by exploiting instruction-level parallelism (I...
As the gap between processor and memory speeds continues to widen, methods for evaluating memory sys...
textMicroprocessor evaluation using detailed cycle-accurate simulation is prohibitively time-consum...
The Memory Wall continues to be a problem with modern systems design. While the steady increase in p...
166 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1992.High speed computer systems p...
Application performance on computer processors depends on a number of complex architectural and micr...
In a trace driven simulation study, a simulation model is evaluated using a program trace as the inp...
To increase performance, modern processors employ complex techniques such as out-of-order pipelines ...
iAbstract As processor cycle times decrease, memory system performance becomes ever more critical to...