We view shared memories as structures which define relations over the set of programs and their executions. An implementation is modeled by a transducer, where the relation it realizes is its language. This approach allows us to cast shared memory verification as language inclusion. We show that a specification can be approximated by an infinite hierarchy of finite-state transducers, called the memory model machines. Also, checking whether an execution is generated by a sequentially consistent memory is approached through a constraint satisfaction formulation. It is proved that if a memory implementation generates a non interleaved sequential and unambiguous execution, it necessarily generates one such execution of bounded size. Our paper s...
Thesis (Sc. D.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2001.Includ...
The notions of serializability, linearizability and sequential consistency are used in the specifica...
We have proposed a framework for verifying that multiprocessor memory systems satisfy the requiremen...
technical reportWe view shared memories as structures which define relations over the set of progra...
A memory model specifies a correctness requirement for a distributed shared memory protocol. Sequent...
Abstract. In shared-memory multiprocessors sequential consistency o ers a natural tradeo between the...
Developing correct and performant concurrent systems is a major challenge. When programming an appli...
Abstract. The contribution of the paper is two-fold. We give a set of properties expressible as temp...
In distributed shared memory architectures, memory usually obeys weaker constraints than that of ord...
Abstract. We investigate the algorithmic feasibility of checking whether concurrent implementations ...
Abstract. We investigate the algorithmic feasibility of checking whether concurrent implementations ...
Conforming to the underlying memory consistency rules is a fundamental requirement for implementing ...
Perhaps the most difficult aspect of designing a shared memory multiprocessor is the hardware protoc...
We study the problem of testing shared memories for violations of memory coherence and consistency. ...
Parallel systems that support the shared memory abstraction are becoming widely accepted in many are...
Thesis (Sc. D.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2001.Includ...
The notions of serializability, linearizability and sequential consistency are used in the specifica...
We have proposed a framework for verifying that multiprocessor memory systems satisfy the requiremen...
technical reportWe view shared memories as structures which define relations over the set of progra...
A memory model specifies a correctness requirement for a distributed shared memory protocol. Sequent...
Abstract. In shared-memory multiprocessors sequential consistency o ers a natural tradeo between the...
Developing correct and performant concurrent systems is a major challenge. When programming an appli...
Abstract. The contribution of the paper is two-fold. We give a set of properties expressible as temp...
In distributed shared memory architectures, memory usually obeys weaker constraints than that of ord...
Abstract. We investigate the algorithmic feasibility of checking whether concurrent implementations ...
Abstract. We investigate the algorithmic feasibility of checking whether concurrent implementations ...
Conforming to the underlying memory consistency rules is a fundamental requirement for implementing ...
Perhaps the most difficult aspect of designing a shared memory multiprocessor is the hardware protoc...
We study the problem of testing shared memories for violations of memory coherence and consistency. ...
Parallel systems that support the shared memory abstraction are becoming widely accepted in many are...
Thesis (Sc. D.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2001.Includ...
The notions of serializability, linearizability and sequential consistency are used in the specifica...
We have proposed a framework for verifying that multiprocessor memory systems satisfy the requiremen...