This paper compares the effectiveness of state-preserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-V§¨ § for data caches using 70nm technology parameters. To perform the comparison, we use “HotLeakage”, a new architectural model for subthreshold and gate leakage that explicitly models the effects of temperature, voltage, and parameter variations, and has the ability to recalculate leakage currents dynamically as temperature and voltage change at runtime due to operating conditions, DVS techniques, etc. By comparing drowsy-cache and gated-V§¨ § at different L2 latencies, we are able to identify a range of operating parameters at which gated-V§¨ § is more energy efficient than drows...
Gate leakage current is fast becoming a major contributor to total leakage and will become the domin...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
On-chip L1 and L2 caches dissipate a sizeable fraction of the total power of processors. As feature ...
yingmin,dharmesh,karthick,skadron¥ This paper compares the effectiveness of statepreserving and non-...
Technology projections indicate that static power will become a major concern in future generations ...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Alth...
Energy management is important for a spectrum of systems ranging from high-performance architectures...
Abstract—Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadverten...
Decreasing power consumption in small devices such as handhelds, cell phones and high-performance pr...
If current technology scaling trends hold, leakage power dissipation will soon become the dominant s...
As feature size shrinks, the dominant component of power consumption will be leakage. As caches repr...
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we ...
4th Workshop on Optimizations for DSP and Embedded Systems : March 26, 2006 : Manhattan, New York, N...
Gate leakage current is fast becoming a major contributor to total leakage and will become the domin...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
On-chip L1 and L2 caches dissipate a sizeable fraction of the total power of processors. As feature ...
yingmin,dharmesh,karthick,skadron¥ This paper compares the effectiveness of statepreserving and non-...
Technology projections indicate that static power will become a major concern in future generations ...
As the transistor feature sizes and threshold voltages reduce, leakage energy consumption has become...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Alth...
Energy management is important for a spectrum of systems ranging from high-performance architectures...
Abstract—Reducing the supply voltage to reduce dynamic power consumption in CMOS devices, inadverten...
Decreasing power consumption in small devices such as handhelds, cell phones and high-performance pr...
If current technology scaling trends hold, leakage power dissipation will soon become the dominant s...
As feature size shrinks, the dominant component of power consumption will be leakage. As caches repr...
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we ...
4th Workshop on Optimizations for DSP and Embedded Systems : March 26, 2006 : Manhattan, New York, N...
Gate leakage current is fast becoming a major contributor to total leakage and will become the domin...
Power dissipation is increasingly important in CPUs rang-ing from those intended for mobile use, all...
On-chip L1 and L2 caches dissipate a sizeable fraction of the total power of processors. As feature ...