efficient calculations of the temperature distribution corresponding to a specific circuit layout and power density distribution will become indispensable in the design of high performance VLSI circuits. In this paper, we present three highly efficient thermal simulation algorithms for calculating the on-chip temperature distribution in a multilayered substrate structure. All three algorithms are based on the concept of the Green function and utilize the technique of discrete cosine transform (DCT). However, the application areas of the algorithms are different.The first algorithm is suitable for localized analysis in thermal problems, while the second algorithm targets full-chip temperature profiling. The third algorithm, which combines th...
Abstract:- We propose a new technique of two dimensional, steady-state thermal analysis for VLSI chi...
With the continual scaling of devices and interconnects, accurate analysis and effective optimizatio...
International audienceAs the feature size decrease with each process generation, and nominal SoC des...
A new algorithm is found and a computer program developed for the more exact calculati...
This paper derives the multi-layer heat conduction Green’s function, by integrating the eigen-expans...
A new algorithm is found and a computer program developed for the more exact calculati...
Power blurring has been developed to calculate temperature profiles in VLSI ICs, in both steady-stat...
The paper describes the application of a 3D large-scale thermal simulation tool to the layout analys...
The continuous advance in technology enables the design of more complex embedded systems making use ...
The continuous advance in technology enables the design of more complex embedded systems making use ...
A CAD approach (using a hybrid finite-element Green's function strategy) is described for the therma...
Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/5920)Internat...
With the continual scaling of devices and interconnects, accurate analysis and effective optimizatio...
Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/5920)Internat...
Compact size of Very Large Scale Integrated (VLSI) system recently causing the rising of the on-chip...
Abstract:- We propose a new technique of two dimensional, steady-state thermal analysis for VLSI chi...
With the continual scaling of devices and interconnects, accurate analysis and effective optimizatio...
International audienceAs the feature size decrease with each process generation, and nominal SoC des...
A new algorithm is found and a computer program developed for the more exact calculati...
This paper derives the multi-layer heat conduction Green’s function, by integrating the eigen-expans...
A new algorithm is found and a computer program developed for the more exact calculati...
Power blurring has been developed to calculate temperature profiles in VLSI ICs, in both steady-stat...
The paper describes the application of a 3D large-scale thermal simulation tool to the layout analys...
The continuous advance in technology enables the design of more complex embedded systems making use ...
The continuous advance in technology enables the design of more complex embedded systems making use ...
A CAD approach (using a hybrid finite-element Green's function strategy) is described for the therma...
Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/5920)Internat...
With the continual scaling of devices and interconnects, accurate analysis and effective optimizatio...
Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/5920)Internat...
Compact size of Very Large Scale Integrated (VLSI) system recently causing the rising of the on-chip...
Abstract:- We propose a new technique of two dimensional, steady-state thermal analysis for VLSI chi...
With the continual scaling of devices and interconnects, accurate analysis and effective optimizatio...
International audienceAs the feature size decrease with each process generation, and nominal SoC des...