Measuring Parameter Variation on an FPGA Using Ring Oscillators

As processor clock frequencies become faster, architecture-level design is becoming increasingly limited by factors such as on-chip variation. Parameter variation occurs in integrated circuits as the result of a variety of manufacturing and physical factors. In this paper, we examine the degree to which there is parameter variation on an FPGA. Data were gathered from a combinatorial logic device instantiated on the FPGA. We analyze these data with respect to variance, and provide a confidence interval for the variance and standard deviation.