Predicting the Performance of Reconfigurable Interconnects in Distributed Shared-Memory Systems

Abstract — New advances in reconfigurable optical interconnect technologies will allow the fabrication of lowcost, fast and run-time adaptable networks for connecting processors and memory modules in large distributed shared-memory multiprocessor machines. Since the switching times of these components are typically high compared to the memory access time, reconfiguration exploits low frequency dynamics in the network traffic patterns. These are however not easily reproduced using statistical traffic generation, the tool of choice when doing a fast design space exploration. In this paper, we present a technique that can accurately predict network performance, based on the traffic patterns obtained from simulating the execution of real benchmark applications, but without the need to perform these slow full-system simulations for every parameter set of interest