Run-time reconfigurable interconnection networks can provide significant performance gains in shared-memory multiprocessor systems. However, designing such networks is hard, requiring detailed but slow execution-driven simulations, since faster methods are currently not suitable for use with dynamic network topologies. In this paper, we extend one of these methods, synthetic traffic generation, to incorporate the dynamic traffic behavior necessary to accurately determine the performance of a reconfigurable network. Our synthetic traffic flow has the same characteristics as the flow resulting from an execution driven simulation, but can be much shorter: we can gain a reduction in simulation time of up to 100 × at only a limited expense in ac...
Modern and future many-core systems represent complex ar-chitectures. The communication fabrics of t...
The Graph500 benchmark attempts to steer the design of High-Performance Computing systems to maximiz...
Evaluation of high performance parallel systems is a delicate issue, due to the difficulty of genera...
Run-time reconfigurable interconnection networks can provide significant performance gains in shared...
Abstract — New advances in reconfigurable optical interconnect technologies will allow the fabricati...
Modern and future many-core systems represent large and complex architectures. The communication fab...
Networks of workstations (NOWs) are becoming increas-ingly popular as a cost-effective alternative t...
For Systems-on-Chip (SoCs) development, a predomi-nant part of the design time is the simulation tim...
Abstract—Design space exploration and detailed anal-ysis in the field of hardware design applies sim...
This thesis concentrates on nonuniform traffic patterns in one class of interconnection networks, th...
In highly parallel Multi-Processor System-on-Chip (MPSoC) design stages, interconnect performance is...
In this paper, we propose a packet-based, off-chip, multi-processor/memory simulation framework to m...
The original publication is available at www.springerlink.comMany simulation-based performance studi...
Modern and future many-core systems represent complex ar-chitectures. The communication fabrics of t...
Abstract—In recent years, traffic engineering has widely re-searched to guarantee QoS. It is importa...
Modern and future many-core systems represent complex ar-chitectures. The communication fabrics of t...
The Graph500 benchmark attempts to steer the design of High-Performance Computing systems to maximiz...
Evaluation of high performance parallel systems is a delicate issue, due to the difficulty of genera...
Run-time reconfigurable interconnection networks can provide significant performance gains in shared...
Abstract — New advances in reconfigurable optical interconnect technologies will allow the fabricati...
Modern and future many-core systems represent large and complex architectures. The communication fab...
Networks of workstations (NOWs) are becoming increas-ingly popular as a cost-effective alternative t...
For Systems-on-Chip (SoCs) development, a predomi-nant part of the design time is the simulation tim...
Abstract—Design space exploration and detailed anal-ysis in the field of hardware design applies sim...
This thesis concentrates on nonuniform traffic patterns in one class of interconnection networks, th...
In highly parallel Multi-Processor System-on-Chip (MPSoC) design stages, interconnect performance is...
In this paper, we propose a packet-based, off-chip, multi-processor/memory simulation framework to m...
The original publication is available at www.springerlink.comMany simulation-based performance studi...
Modern and future many-core systems represent complex ar-chitectures. The communication fabrics of t...
Abstract—In recent years, traffic engineering has widely re-searched to guarantee QoS. It is importa...
Modern and future many-core systems represent complex ar-chitectures. The communication fabrics of t...
The Graph500 benchmark attempts to steer the design of High-Performance Computing systems to maximiz...
Evaluation of high performance parallel systems is a delicate issue, due to the difficulty of genera...