Abstract. It is explained how DILL (Digital Logic in LOTOS) can be used to specify and analyse hardware timing characteristics using ET-LOTOS (Enhanced Timed LOTOS), a timed extension of the ISO standard formal language LOTOS (Language of Temporal Ordering Specification). Hardware component functionality and timing characteristics are rigorously specified and then validated. As will be seen, subtle timing problems can be found by using this approach
Digital hardware is treated as a collection of interacting parallel components. This permits the use...
In this paper we present a new approach to the formal specification of distributed real-time systems...
This report investigates modelling and verifying synchronous circuits in DILL (Digital Logic in LOTO...
It is explained how DILL (Digital Logic in LOTOS) can be used to specify and analyse hardware timing...
As a relatively new application area for LOTOS (Language Of Temporal Ordering Specification), the sp...
This paper investigates specification and verification of synchronous circuits using DILL (Digital L...
The formal specification language LOTOS provides a model of systems where the temporal ordering of a...
Enhanced Timed-LOTOS, called ET-LOTOS, is an extension of LOTOS allowing the modelling of time-sensi...
Enhanced Timed-LOTOS, denoted ET-LOTOS, is an extension of LOTOS that allows the modelling of real-t...
Enhanced Timed-LOTOS, denoted ET-LOTOS, is an extension of LOTOS that allows the modelling of real-t...
This paper reports on some initial results in using LOTOS as a hardware description language. LOTOS,...
Timethreads are a new notation for visual description of the different causality paths of a system. ...
International audienceThe LOTOS and E-LOTOS Languages LOTOS (Language of Temporal Ordering Specifica...
We give a brief presentation of ET-LOTOS. ET-LOTOS extends with quantative time the formal descripti...
peer reviewedWe propose here ET-LOTOS, a timed extension of LOTOS. It is an enhancement of Timed LOT...
Digital hardware is treated as a collection of interacting parallel components. This permits the use...
In this paper we present a new approach to the formal specification of distributed real-time systems...
This report investigates modelling and verifying synchronous circuits in DILL (Digital Logic in LOTO...
It is explained how DILL (Digital Logic in LOTOS) can be used to specify and analyse hardware timing...
As a relatively new application area for LOTOS (Language Of Temporal Ordering Specification), the sp...
This paper investigates specification and verification of synchronous circuits using DILL (Digital L...
The formal specification language LOTOS provides a model of systems where the temporal ordering of a...
Enhanced Timed-LOTOS, called ET-LOTOS, is an extension of LOTOS allowing the modelling of time-sensi...
Enhanced Timed-LOTOS, denoted ET-LOTOS, is an extension of LOTOS that allows the modelling of real-t...
Enhanced Timed-LOTOS, denoted ET-LOTOS, is an extension of LOTOS that allows the modelling of real-t...
This paper reports on some initial results in using LOTOS as a hardware description language. LOTOS,...
Timethreads are a new notation for visual description of the different causality paths of a system. ...
International audienceThe LOTOS and E-LOTOS Languages LOTOS (Language of Temporal Ordering Specifica...
We give a brief presentation of ET-LOTOS. ET-LOTOS extends with quantative time the formal descripti...
peer reviewedWe propose here ET-LOTOS, a timed extension of LOTOS. It is an enhancement of Timed LOT...
Digital hardware is treated as a collection of interacting parallel components. This permits the use...
In this paper we present a new approach to the formal specification of distributed real-time systems...
This report investigates modelling and verifying synchronous circuits in DILL (Digital Logic in LOTO...