Value specialization is a technique which can improve a program’s performance when its code frequently takes the same values. In this paper, speculative value specialization is applied dynamically by utilizing the trace cache hardware. We implement a small, efficient hardware profiler to identify loads that have semi-invariant runtime values. A specialization engine off the program’s critical path generates highly optimized traces using these values, which reside in the trace cache. Specialized traces are dynamically verified during execution, and mis-specialization is recovered automatically without new hardware overhead. Our simulation shows that dynamic value specialization in the trace cache achieves a 17 % speedup, even over a system w...
A dynamic optimizer is a software-based system that performs code modifications at runtime, and seve...
The Software Trace Cache is a compiler transformation, or a postcompilation binary optimization, tha...
The processor-memory gap is widening every year with no prospect of reprieve. More and more latency ...
Trace caches are used to help dynamic branch prediction make multiple predictions in a cycle by embe...
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetch...
We explore the use of compiler optimizations, which optimize the layout of instructions in memory. T...
In this paper we address the important problem of instruc-tion fetch for future wide issue superscal...
As the issue width of superscalar processors is increased, instruction fetch bandwidth requirements ...
As the instruction issue width of superscalar proces-sors increases, instruction fetch bandwidth req...
In order to meet the demands of wider issue processors, fetch mechanisms will need to fetch multiple...
To maximize the performance of a wide-issue superscalar processor, the fetch mechanism must be capab...
A dynamic optimizer is a software-based system that performs code modifications at runtime, and seve...
Cache performance analysis is becoming increasingly important in microprocessor design. This work ex...
Effective dynamic virtual-machine optimization depends on quickly finding and optimizing frequently...
The use of Trace Caches is a well known technique to overcome the problem of limited instruction fet...
A dynamic optimizer is a software-based system that performs code modifications at runtime, and seve...
The Software Trace Cache is a compiler transformation, or a postcompilation binary optimization, tha...
The processor-memory gap is widening every year with no prospect of reprieve. More and more latency ...
Trace caches are used to help dynamic branch prediction make multiple predictions in a cycle by embe...
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetch...
We explore the use of compiler optimizations, which optimize the layout of instructions in memory. T...
In this paper we address the important problem of instruc-tion fetch for future wide issue superscal...
As the issue width of superscalar processors is increased, instruction fetch bandwidth requirements ...
As the instruction issue width of superscalar proces-sors increases, instruction fetch bandwidth req...
In order to meet the demands of wider issue processors, fetch mechanisms will need to fetch multiple...
To maximize the performance of a wide-issue superscalar processor, the fetch mechanism must be capab...
A dynamic optimizer is a software-based system that performs code modifications at runtime, and seve...
Cache performance analysis is becoming increasingly important in microprocessor design. This work ex...
Effective dynamic virtual-machine optimization depends on quickly finding and optimizing frequently...
The use of Trace Caches is a well known technique to overcome the problem of limited instruction fet...
A dynamic optimizer is a software-based system that performs code modifications at runtime, and seve...
The Software Trace Cache is a compiler transformation, or a postcompilation binary optimization, tha...
The processor-memory gap is widening every year with no prospect of reprieve. More and more latency ...