ABSTRACT Several multiprocessor systems are now commercially available, and advances in com-piler technology provide automatic conversion of programs to run on such systems. However, no accepted measure of this parallel compiler ability exists. This paper presents a test suite ofsubroutines and loops, called Parallel Loops, designed to (1) measure the ability of parallelizing compilers to convert code to run in parallel and (2) determine how effectively parallel hardwareand software work together to achieve high performance across a range of problem sizes. In addition, we present the results of compiling this suite using two commercially available paral-lelizing Fortran compilers, Cray and Convex
A new technique for estimating and understanding the speed improvement that can result from executin...
Due to the character of the original source materials and the nature of batch digitization, quality ...
We carried out a series of benchmark tests to know the ability of automatic parallelization of four ...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
[[abstract]]The main function of parallelizing compilers is to analyze sequential programs, in parti...
Modern computers will increasingly rely on parallelism to achieve high computation rates. Techniques...
[[abstract]]Multithreaded programming support seems to be the most obvious approach to helping progr...
[[abstract]]It is well known that extracting parallel loops plays a significant role in designing pa...
The performance of many parallel applications relies not on instruction-level parallelism but on loo...
The recent success of vector computers like the Cray-1 and array processors such as those manufactur...
Over the past two decades tremendous progress has been made in both the design of parallel architect...
Abstract. The growing popularity of multiprocessor workstations among general users calls for a more...
Current parallelizing compilers cannot identify a significant frac-tion of parallelizable loops beca...
Abstract. We compare the capabilities of several commercially available, vectorizing Fortran compile...
A new technique for estimating and understanding the speed improvement that can result from executin...
Due to the character of the original source materials and the nature of batch digitization, quality ...
We carried out a series of benchmark tests to know the ability of automatic parallelization of four ...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
Current parallelizing compilers cannot identify a significant fraction of parallelizable loops becau...
[[abstract]]The main function of parallelizing compilers is to analyze sequential programs, in parti...
Modern computers will increasingly rely on parallelism to achieve high computation rates. Techniques...
[[abstract]]Multithreaded programming support seems to be the most obvious approach to helping progr...
[[abstract]]It is well known that extracting parallel loops plays a significant role in designing pa...
The performance of many parallel applications relies not on instruction-level parallelism but on loo...
The recent success of vector computers like the Cray-1 and array processors such as those manufactur...
Over the past two decades tremendous progress has been made in both the design of parallel architect...
Abstract. The growing popularity of multiprocessor workstations among general users calls for a more...
Current parallelizing compilers cannot identify a significant frac-tion of parallelizable loops beca...
Abstract. We compare the capabilities of several commercially available, vectorizing Fortran compile...
A new technique for estimating and understanding the speed improvement that can result from executin...
Due to the character of the original source materials and the nature of batch digitization, quality ...
We carried out a series of benchmark tests to know the ability of automatic parallelization of four ...