The test pattern generator produces test vectors that are applied to the tested circuit during pseudo-random testing of combinational circuits. The nature of the generator thus directly influences the fault coverage achieved. In this paper we discuss the influence of the type of pseudo-random pattern generator on stuck-at fault coverage. Linear feedback shift registers (LFSRs) are mostly used as test pattern generators, and the generating polynomial is primitive to ensure the maximum period. We have shown that it is not necessary to use primitive polynomials, and moreover that their using is even undesirable in most cases. This fact is documented by statistical graphs. The necessity of the proper choice of a generating polynomial and...
Built in self testing (BIST) is most attractive technique to test different kind of circuits. In BIS...
Recently a multiple-sequence test generator was presented based on two-dimensional linear feedback s...
Digital cores that are currently incorporated into advanced Systems on Chip (SoC) frequently include...
The test pattern generator produces test vectors that are applied to the tested circuit during pseud...
Pseudo Random Number Generators are widely used in VLSI Design as Test Pattern Generators for testin...
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be us...
International audienceThe combination of higher quality requirements and sensitivity of high perform...
This paper proposes low power pseudo random Test Pattern generation .This test pattern is run on the...
To improve the test accuracy and fault coverage of high-speed railway-related equipment boards, a ti...
This paper investigates the impact of the changes of the characteristic polynomials and initial load...
In this paper, we address the problem of functional testing of mixed-signal circuits using pseudo-ra...
Current methodologies for built-in test pattern generation usually employ a predetermined linear fee...
A linear feedback shift register (LFSR) has been frequently used in the Built-in Self-Test (BIST) de...
We have considered implementation of parallel test pattern generator based on a linear feedback shif...
In this paper, we propose a new scheme for Built-In Test (BIT) that uses Multiple-polynomial Linear ...
Built in self testing (BIST) is most attractive technique to test different kind of circuits. In BIS...
Recently a multiple-sequence test generator was presented based on two-dimensional linear feedback s...
Digital cores that are currently incorporated into advanced Systems on Chip (SoC) frequently include...
The test pattern generator produces test vectors that are applied to the tested circuit during pseud...
Pseudo Random Number Generators are widely used in VLSI Design as Test Pattern Generators for testin...
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be us...
International audienceThe combination of higher quality requirements and sensitivity of high perform...
This paper proposes low power pseudo random Test Pattern generation .This test pattern is run on the...
To improve the test accuracy and fault coverage of high-speed railway-related equipment boards, a ti...
This paper investigates the impact of the changes of the characteristic polynomials and initial load...
In this paper, we address the problem of functional testing of mixed-signal circuits using pseudo-ra...
Current methodologies for built-in test pattern generation usually employ a predetermined linear fee...
A linear feedback shift register (LFSR) has been frequently used in the Built-in Self-Test (BIST) de...
We have considered implementation of parallel test pattern generator based on a linear feedback shif...
In this paper, we propose a new scheme for Built-In Test (BIT) that uses Multiple-polynomial Linear ...
Built in self testing (BIST) is most attractive technique to test different kind of circuits. In BIS...
Recently a multiple-sequence test generator was presented based on two-dimensional linear feedback s...
Digital cores that are currently incorporated into advanced Systems on Chip (SoC) frequently include...