EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and

In this paper, we introduce a class of irredundant low power encoding techniques for memory address buses. For a data address bus, the proposed encoding techniques make use of two working zones in the memory space whereas for a multiplexed data and instruction address bus, up to four working zones can be supported. The zones are dynamically updated to improve the power efficiency of the proposed encoding techniques. These techniques decrease the switching activity of data address and multiplexed address buses by an average of 55% and 77%, respectively, up from 25% and 64% achieved by previous methods