Energy Awareness and Uncertainty in . . .

ILITY, CONCENTRATING ON GATE LENGTH AND ON-CHIP TEMPERATURE VARIATIONS. TO ASSESS THE EFFECT OF MICROARCHITECTURE DECISIONS ON THESE VARIATIONS, AND VICE VERSA, THEY PROPOSE A JOINT PERFORMANCE, POWER, AND VARIABILITY METRIC THAT DISTINGUISHES AMONG VARIOUS DESIGN CHOICES. ENERGY AWARENESS AND UNCERTAINTY IN MICROARCHITECTURE-LEVEL DESIGN Published by the IEEE Computer Society 0272-1732/05/$20.00 # 2005 IEEE adaptive body biasing and adaptive voltage supply to increase the highest-frequency bins and thus reduce clock speed variability. However, many decisions made at the microarchitecture level affect design variability, while also significantly affecting the design's overall performance and power profile. This is especially true of high-performance processors whose complex logic is dedicated to increasing performance and extracting more parallelism (for example, issue and out-of-order logic, branch or value prediction, and trace caches), or whose clustered architectures