Data-Reuseand Parallel Embed1 Architectures for Low-Power, Real-TimeMultimed2 Applications D. Soudris

Exploitation of data re-usein combinq8qq with the use of custom memory hierarchy that exploits the temporal locality of data accesses may in troducesignk8== t power savin8A especially for datain ten-6 eapplication9 The e#ect of the data-reusedecision on the power dissipation but alsoon areaan performank of multimediaapplication realizedon multiple embedded cores is explored. Thein teraction between the data-reusedecision an theselection of acertain data-memory architecture model is also studied. Asdemon46yq== a widely-used video processin algorithmic kernAk nnAk the full searchmotion estimation kern(; is used. Experimen tal results prove that improvemen tsin both poweran performan8 can be acquired,when the right combin4z=9 of data memory architecture model an data-reusetranreuse6q9q is selected