Bottom-Up Performance Analysis of HW/SW Platforms

Today's complex embedded systems integrate multiple hardware and software components, many of them provided as IP from different vendors. Performance analysis is crucial for such heterogeneous systems. There already exists a variety of formal timing analysis techniques for small sub-problems, e. g. task performance, scheduling strategies, etc.. In this paper, we analyze these individual approaches in the context of performance analysis of heterogeneous platforms at different levels of abstraction, and present a three-level bottom-up analysis procedure