This paper presents a new method for the testing of the datapath of DSP cores based on self-test program. During the test, random patterns areloaded into the core, exercise di#erent components of the core, and then areloaded out of the core for observation under the control of the self-test programs. We propose a systematic approach to generate the self-test program based on two metrics. One is the structural coverage and the other is the testability metric. Experimental results show the self-test program obtained by this approach can reach very high fault coverage in programmable core testing
This thesis introduces a comprehensive approach for making a particular class of embedded processors...
Embedded processor testing techniques based on the execution of self-test routines, have been recent...
Instruction-based self-testing of embedded processor cores provides an excellent technique for balan...
The rapid progress made in integrating enormous numbers of transistors on a single chip is making it...
Testing is a crucial issue in SOC development and production process. A popular solution for SOCs th...
Software self-testing for embedded processor cores based on their instruction set, is a topic of inc...
Abstract—Embedded processor testing techniques based on the execution of self-test programs have bee...
Software based self-testing of embedded processor cores provides an excellent technique for balancin...
Abstract. Software based self-testing of embedded processor cores provides an excellent technique fo...
Software self-testing of embedded processor cores which effectively partitions the testing effort be...
Software self-testing of embedded processor cores which effectively partitions the testing effort be...
Abstract—Software-based self-test (SBST) is a promising new technology for at-speed testing of embed...
More pronounced aging effects, more frequent early-life failures, and incomplete testing and verific...
This paper presents a method of test program generation for software-based self-test of pipelined pr...
A comprehensive online test strategy requires both concurrent and non-concurrent fault detection cap...
This thesis introduces a comprehensive approach for making a particular class of embedded processors...
Embedded processor testing techniques based on the execution of self-test routines, have been recent...
Instruction-based self-testing of embedded processor cores provides an excellent technique for balan...
The rapid progress made in integrating enormous numbers of transistors on a single chip is making it...
Testing is a crucial issue in SOC development and production process. A popular solution for SOCs th...
Software self-testing for embedded processor cores based on their instruction set, is a topic of inc...
Abstract—Embedded processor testing techniques based on the execution of self-test programs have bee...
Software based self-testing of embedded processor cores provides an excellent technique for balancin...
Abstract. Software based self-testing of embedded processor cores provides an excellent technique fo...
Software self-testing of embedded processor cores which effectively partitions the testing effort be...
Software self-testing of embedded processor cores which effectively partitions the testing effort be...
Abstract—Software-based self-test (SBST) is a promising new technology for at-speed testing of embed...
More pronounced aging effects, more frequent early-life failures, and incomplete testing and verific...
This paper presents a method of test program generation for software-based self-test of pipelined pr...
A comprehensive online test strategy requires both concurrent and non-concurrent fault detection cap...
This thesis introduces a comprehensive approach for making a particular class of embedded processors...
Embedded processor testing techniques based on the execution of self-test routines, have been recent...
Instruction-based self-testing of embedded processor cores provides an excellent technique for balan...