Compact Digital Hardware Implementation of Spiking Neural Networks

Classical Neural Networks consume many resources when they are implemented directly in hardware; but it are these parallel hardware implementations that unleash the intrinsic parallel nature of Neural Networks. Recently Spiking Neural Networks, which are biologically more plausible models of neurons that use spikes to communicate, get increasing attention. This publication gives a short overview of several novel digital implementation of Spiking Neural Networks on Field Programmable Gate Arrays. The emphasis is on very compact implementations so that as many neurons as possible can be implemented in parallel