In digital signal processing, we often use higher radix system to achieve high-speed computation. In such cases, we require radix converters. This paper considers the design of LUT cascades that convert p-nary numbers to q-nary numbers. In particular, we derive several upper bounds on the column multiplicities of decomposition charts that represent radix converters. From these, we can estimate the size of LUT cascades to realize radix converters. These results are useful to design compact radix converters, since these bounds show strategies to partition the outputs into groups
Abstract—This paper proposes an architecture and a synthesis method for high-speed computation of fi...
The multiplier uses LUT’s as memory for their computations. The antisymmetric product coding (APC) a...
The split-radix algorithm (SR) is a highly efficient version of the successive doubling method. Its ...
In arithmetic circuits for digital signal processing, radixes other than two are often used to make ...
In digital signal processing, radixes other than two are often used for high-speed computation. In t...
FFT is one of the most active blocks in digital signal processing and in various field of communicat...
IEEEIn this brief, we present a novel design methodology of cost-effective approximate radix-4 Booth...
Owing to its simplicity radix-2 is a popular algorithm to implement fast fourier transform. Radix-2 ...
The Discrete Fourier Transform (DFT) has a plethora of applications in applied mathematics and elect...
Due to the character of the original source materials and the nature of batch digitization, quality ...
Modern RISC processors provide a special instruction -- the fused multiplyadd (FMA) instruction \Si...
Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residu...
Abstract-This paper proposes an FFT circuit based on a residue number system (RNS) using LUT cascade...
Power consumption is an important constraint in multimedia and deep learning applications. Approxima...
The discrete Fourier transform (DFT) and discrete Hartley transform (DHT) play a crucial role in one...
Abstract—This paper proposes an architecture and a synthesis method for high-speed computation of fi...
The multiplier uses LUT’s as memory for their computations. The antisymmetric product coding (APC) a...
The split-radix algorithm (SR) is a highly efficient version of the successive doubling method. Its ...
In arithmetic circuits for digital signal processing, radixes other than two are often used to make ...
In digital signal processing, radixes other than two are often used for high-speed computation. In t...
FFT is one of the most active blocks in digital signal processing and in various field of communicat...
IEEEIn this brief, we present a novel design methodology of cost-effective approximate radix-4 Booth...
Owing to its simplicity radix-2 is a popular algorithm to implement fast fourier transform. Radix-2 ...
The Discrete Fourier Transform (DFT) has a plethora of applications in applied mathematics and elect...
Due to the character of the original source materials and the nature of batch digitization, quality ...
Modern RISC processors provide a special instruction -- the fused multiplyadd (FMA) instruction \Si...
Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residu...
Abstract-This paper proposes an FFT circuit based on a residue number system (RNS) using LUT cascade...
Power consumption is an important constraint in multimedia and deep learning applications. Approxima...
The discrete Fourier transform (DFT) and discrete Hartley transform (DHT) play a crucial role in one...
Abstract—This paper proposes an architecture and a synthesis method for high-speed computation of fi...
The multiplier uses LUT’s as memory for their computations. The antisymmetric product coding (APC) a...
The split-radix algorithm (SR) is a highly efficient version of the successive doubling method. Its ...