On current superscalar processors, performance and power issues cannot be decoupled for designers. Extensive simulations are usually required to meet both power and performance constraints. This paper describes an integrated performance and power analytical model. The model's performance and power results are in good agreement with detailed simulations, previous models and physically measured results. For designers, the model enables quick and flexible explorations into a subset of even entire huge parameter space of more than 15 workload and architectural parameters plus leakage power, feature sizes, clock and voltage
Massive parallelism combined with complex memory hierarchies and heterogeneity in high-performance c...
In this paper, we propose an analytic model that takes as inputs a) a parametric microarchitecture-i...
DoctorProcessor microarchitectures have been evolving and getting sophisticated to meet increasing c...
Abstract. As process technology scales down, power wall starts to hinder improvements in processor p...
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC2948-95
High-level decisions in high-performance processors are often decoupled from their ultimate impact o...
Optimizing processors for (a) specific application(s) can substantially improve energy-efficiency. W...
Optimizing processors for specific application(s) can substantially improve energy-efficiency. With ...
The need to perform early design studies that combine architectural simulation with power estimation...
Abstract1- This paper presents an efficient design exploration environment for high-end core process...
High performance, low power and low cost will continue to be driving factors for digital signal proc...
Modern processors are becoming increasingly more complex and utilise higher numbers of Heterogeneous...
Abstract – In this work, our goal is to develop a fast and accurate power model of the ARM926EJ-S pr...
9 pagesA new approach to characterize the power dissipation on complex digital signal processors (DS...
Abstract—With power becoming a major constraint for mul-tiprocessor embedded systems, it is becoming...
Massive parallelism combined with complex memory hierarchies and heterogeneity in high-performance c...
In this paper, we propose an analytic model that takes as inputs a) a parametric microarchitecture-i...
DoctorProcessor microarchitectures have been evolving and getting sophisticated to meet increasing c...
Abstract. As process technology scales down, power wall starts to hinder improvements in processor p...
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC2948-95
High-level decisions in high-performance processors are often decoupled from their ultimate impact o...
Optimizing processors for (a) specific application(s) can substantially improve energy-efficiency. W...
Optimizing processors for specific application(s) can substantially improve energy-efficiency. With ...
The need to perform early design studies that combine architectural simulation with power estimation...
Abstract1- This paper presents an efficient design exploration environment for high-end core process...
High performance, low power and low cost will continue to be driving factors for digital signal proc...
Modern processors are becoming increasingly more complex and utilise higher numbers of Heterogeneous...
Abstract – In this work, our goal is to develop a fast and accurate power model of the ARM926EJ-S pr...
9 pagesA new approach to characterize the power dissipation on complex digital signal processors (DS...
Abstract—With power becoming a major constraint for mul-tiprocessor embedded systems, it is becoming...
Massive parallelism combined with complex memory hierarchies and heterogeneity in high-performance c...
In this paper, we propose an analytic model that takes as inputs a) a parametric microarchitecture-i...
DoctorProcessor microarchitectures have been evolving and getting sophisticated to meet increasing c...