Add to ORKGThis paper describes algebraic techniques that target low power consumption. A unique power cost function based on decomposed factored form representation of a Boolean expression is introduced to guide the structural transformations. Circuits synthesized by the SIS [5] and POSE [1] consume 54.5% and 10.4% more power than that obtained by our tool respectively.
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic ...
International audienceThe work presented in this paper is part of a project that focuses on sorting ...
In electronic design automation Boolean resynthesis techniques are increasingly used to improve the ...
This paper describes algebraic techniques that target low power consumption. A unique power cost fun...
Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel a...
This thesis presents techniques for automatically synthesizing VLSI circuits having low power dissip...
In this paper, we consider the problem of logic simplification for a special class of logic function...
A factorization, which provides a factored form, is an extremely important part of multi-level logic...
This paper presents new methods for restructuring logic networks based on fast Boolean techniques. T...
We propose a new power consumption model which accounts for the power consumption at the internal no...
135 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998.In the first part of the work...
Boolean functional decomposition techniques built on top of Shannon cofactoring are applied to obtai...
[[abstract]]In this article we present a new approach to the problem of local logic transformation f...
In his paper, we address the problem of minimizing the average power dissipation during the technolo...
This thesis introduces new concepts to perform area-power-delay trade-offs in a logic synthesis syst...
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic ...
International audienceThe work presented in this paper is part of a project that focuses on sorting ...
In electronic design automation Boolean resynthesis techniques are increasingly used to improve the ...
This paper describes algebraic techniques that target low power consumption. A unique power cost fun...
Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel a...
This thesis presents techniques for automatically synthesizing VLSI circuits having low power dissip...
In this paper, we consider the problem of logic simplification for a special class of logic function...
A factorization, which provides a factored form, is an extremely important part of multi-level logic...
This paper presents new methods for restructuring logic networks based on fast Boolean techniques. T...
We propose a new power consumption model which accounts for the power consumption at the internal no...
135 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1998.In the first part of the work...
Boolean functional decomposition techniques built on top of Shannon cofactoring are applied to obtai...
[[abstract]]In this article we present a new approach to the problem of local logic transformation f...
In his paper, we address the problem of minimizing the average power dissipation during the technolo...
This thesis introduces new concepts to perform area-power-delay trade-offs in a logic synthesis syst...
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic ...
International audienceThe work presented in this paper is part of a project that focuses on sorting ...
In electronic design automation Boolean resynthesis techniques are increasingly used to improve the ...