One of the key issues in hardware/software--cosynthesis is precise estimation. The usual local estimation techniques are inadequate for globally optimising compilers and synthesis tools. We present a path based estimation technique which allows a computation time/quality tradeoff. The results show acceptable computation times while revealing much more potential parallelism than local list scheduling. 1 Introduction System level design becomes more important since the time to market (e.g. about 18 months for complex HW/SW systems [Keu94]) decreases at a continuously increasing complexity of mixed hardware/software systems. As a consequence, uniform specification of HW/SW systems, HW/SW partitioning, HW synthesis, SW synthesis, cosimulation...
Algorithms are more and more made available as part of libraries or tool kits. For a user of such a ...
Two new performance estimation algorithms are presented in this report. One is an optimal lower-boun...
High-level cost and performance estimation, coupled with a fast hardware/software co-simulation fram...
Hardware/software (HW/SW) partitioning is one of the crucial steps of co-design systems. It determin...
Abstract--- High-level estimation techniques are of paramount importance for design decisions like h...
An important presupposition for HW/SW partitioning are sophisticated estimation algorithms at a high...
Estimating the upper bound of the time of execution of a program is of the utmost importance to hard...
Heterogeneous System Development needs Hardware/Software Partitioning performed early on in the deve...
Heterogeneous System Development needs Hardware/Software Partitioning performed early on in the deve...
Hardware/software (HW-SW) partitioning is a key problem in the codesign of embedded systems, studied...
Previous work in software/hardware codesign has addressed issues in system modeling, partitioning, a...
Performance increase, in terms of faster execution and energy efficiency, is a never-ending research...
Algorithms are more and more made available as part of libraries or tool kits. For a user of such a ...
The design of an embedded system is a process where the timing of the architecture should rake into ...
Hardware estimation is an important factor in Hardware/Software Co-design. In this dissertation, we ...
Algorithms are more and more made available as part of libraries or tool kits. For a user of such a ...
Two new performance estimation algorithms are presented in this report. One is an optimal lower-boun...
High-level cost and performance estimation, coupled with a fast hardware/software co-simulation fram...
Hardware/software (HW/SW) partitioning is one of the crucial steps of co-design systems. It determin...
Abstract--- High-level estimation techniques are of paramount importance for design decisions like h...
An important presupposition for HW/SW partitioning are sophisticated estimation algorithms at a high...
Estimating the upper bound of the time of execution of a program is of the utmost importance to hard...
Heterogeneous System Development needs Hardware/Software Partitioning performed early on in the deve...
Heterogeneous System Development needs Hardware/Software Partitioning performed early on in the deve...
Hardware/software (HW-SW) partitioning is a key problem in the codesign of embedded systems, studied...
Previous work in software/hardware codesign has addressed issues in system modeling, partitioning, a...
Performance increase, in terms of faster execution and energy efficiency, is a never-ending research...
Algorithms are more and more made available as part of libraries or tool kits. For a user of such a ...
The design of an embedded system is a process where the timing of the architecture should rake into ...
Hardware estimation is an important factor in Hardware/Software Co-design. In this dissertation, we ...
Algorithms are more and more made available as part of libraries or tool kits. For a user of such a ...
Two new performance estimation algorithms are presented in this report. One is an optimal lower-boun...
High-level cost and performance estimation, coupled with a fast hardware/software co-simulation fram...