Actor Hardware Design For Static Dataflow Model

Starting from a static dataflow model it is possible to establish an easy one-to-one correspondance between actors of the model and actors of the machine. This correspondance allows to realize a fine grain dataflow engine with identical Functional Units (FUs) that are the hardware actor implementation. Although actors are characterized by having homogeneous I/O conditions, that is one output and two input arcs, no control signals and synchronization among FUs need to execute part of a program besides that imposed by dataflow paradigm. Because their simple hardware design and homogeneity, VLSI technology can be used massively to realize a parallel dataflow machine with thousands of FUs to attack thus seriously the von Neumann model. 1. Introduction The dataflow model of computation offers a simple, yet powerful, formalism for describing parallel computation. Under it, a computation is described by a dataflow graph (DFG), a directed graph with nodes representing actors and arcs transmit..