Enhancing the Data Sharing Flexibility of Tagged Cache Coherence Directories

Dynamically tagged directories are memory-efficient mechanisms for maintaining cache coherence in large-scale shared-memory multiprocessors. These directories use special-purpose tag caches that are subject to two types of overflow: 1) pointer overflow, which limits the maximum number of processors that can simultaneously share a memory block, and 2) set overflow, which forces the premature invalidation of cached memory blocks. These invalidations of actively referenced blocks cause extra data cache misses, which can reduce the system's memory performance. We propose a superassociative tagged directory structure that can preserve some of the cached copies of a memory block when a set overflows by allowing multiple address tags in the same set to contain the same address value. Verilog descriptions of a standard and a superassociative tagged directory are used to estimate their implementation costs and timing delays. A multiprocessor simulator driven by traces from a subset of the Perf..