A Trace-Driven Analysis of XMEM: Another Level in the Memory Hierarchy

Modern computer architectures make use of memory hierarchies to hide the latency associated with accessing slower devices. While CPU speeds have been increasing exponentially, disk access times have remained nearly constant. This trend has caused a dramatic rise in the relative cost of a page fault. In this paper, we evaluate the merits of introducing XMEM, another level in the memory hierarchy, between primary (main memory) and secondary (magnetic disk) storage. We modified a version of the UNIX kernel to produce a trace of all page faults. A simulator for XMEM determined that in some instances, XMEM could produce very reasonable results. 1 Introduction Modern computer architectures make use of memory hierarchies to hide latency associated with access to slower devices. CPUs have a small on-chip (L1) cache and a larger off-chip (L2) cache made of Static RAM. Misses to these caches are serviced by accessing larger but slower core memory (made up of Dynamic RAM). Hardware and the machi..