STA: A System Testability Assistant

This paper presents a Computer Aided Testability tool named STA (System Testability Assistant), aiming at proposing a testability strategy for system as early as possible in the design process. Given a system description, STA first compiles it in order to create system, boards, and circuits objects, and then proceeds bottom-up, from the circuit to the system, in order evaluate the actual testability of the whole system, recommend a testability strategy and testability features inclusion in some modules, and provides support for including these testability features in the system by calling external generators or synthesis for testability tools. 1 Introduction As HW/SW systems become more complex, their testability become a severe problem. Consequently Synthesis for Testability (SFT) techniques should provide an efficient answer to system testability requirements and so permit an efficient and flexible further maintenance. Currently, The aim is to introduce testability features as early..