Pica: An Ultra-Light Processor for High-Throughput Applications

This paper introduces Pica, a fine-grain, message passing architecture designed to efficiently support high-throughput parallel applications. The architecture minimizes overhead for basic parallel operations. An operand-addressed context cache and round-robin task manager allow single cycle task swaps. Fixed-sized activation contexts simplify storage management. Wordtag synchronization bits provide low-cost synchronization. The focus on high-throughput applications allows a small local memory (1024 36-bit words). A complete node (including memory) can be implemented using a fraction of a chip. A multi-node chip prototype (four nodes/chip) is being designed. In order to meet chip I/O requirements, a high-bandwidth, threedimensional optical network is also being designed. Using recent developments in epitaxial liftoff of optoelectronic devices and through-chip transmission, a network is presented that provides 3.2 Gbits/sec offchip bandwidth. 1 High-Bandwidth Parallelism There are many..