Design Methodologies for Partially Reconfigured Systems

Run-time reconfiguration (RTR) is an implementation approach that divides an application into a series of sequentially executed stages with each stage implemented as a separate circuit module. Partial RTR extends this approach by partitioning these stages and designing their circuit modules such that they exhibit a high degree of functional and physical commonality. Transitioning between configurations can then be accomplished by updating only the differences between configurations. This reduces the amount of time that an RTR application spends configuring and significantly enhances overall performance. This paper presents the design methodology for partial RTR in the context of RRANN2, a partial RTR artificial neural network. 1 Introduction Since its introduction, the Field Programmable Gate Array (FPGA) has received increasing attention due to its proficiency as a reconfigurable logic device. Its merits include not only the ability to implement arbitrary logic functions, but also t..