Reducing Power Consumption at the Control Path of High Performance Microprocessors

Low power embedded processors become more important for portable applications. For CMOS circuits, power is consumed during the charging and discharging of the capacitances. Reducing switching activities would significantly reduce power consumption of an embedded processor. In this paper, we address the problem of how to reduce switching activities at the control path of an embedded processor. We study the effects of using Gray code as the addressing scheme to reduce the switching activities. Gray codes have an advantage over the conventional binary code in that consecutive memory addresses have only one-bit different. Due to locality of program execution, Gray code addressing can significantly reduce the amount of switching on the instruction address bits. Also an instruction scheduling technique called cold scheduling, is developed to reorder the instruction sequence to reduce the switching activities. Reducing Power Consumption at the Control Path of High Performance Microprocessors..