Distributed shared memory (DSM) machines can be characterized by four parameters, based on a slightly modified version of the logP model. The l (latency) and o (occupancy of the communication controller) parameters are the keys to performance in these machines, and are largely determined by major architectural decisions about the aggressiveness and customization of the node and network. For recent and upcoming machines, the g (gap) parameter that measures node-to-network bandwidth does not appear to be a bottleneck. Conventional wisdom is that latency is the dominant factor in determining the performance of a DSM machine. We show, however, that controller occupancy ---which causes contention even in highly optimized applications---plays a ...
In this research the various issues that arise in the design and implementation of distributed shar...
Multi-core multi-socket distributed shared-memory com- puters (DSM computers, for short) have become...
Analytical models were developed and simulations of memory latency were performed for Uniform Memory...
Abstract Distributed shared memory (DSM) machines can be characterized by four parameters, based on ...
: Many research results in recent years have focused on the design of distributed shared memory (DSM...
The goal of this paper is to gain insight into the relative performance of communication mechanisms ...
Abstract—This paper studies the isolated and combined effects of several latency-tolerance technique...
Link to published version: http://ieeexplore.ieee.org/iel3/4807/13287/00604674.pdf?tp=&arnumber=6046...
Recent technological advances have produced network interfaces that provide users with very low-late...
Broadcast-based DSM multiprocessors are nowadays an attractive platform for parallel computing due t...
9th International Conference on Electronics Computer and Computation (ICECCO 2012) -- NOV 01-03, 201...
grantor: University of TorontoLarge communication latency is a key obstacle to achieving h...
Abstract Communications overhead is one of the most important factors affecting per-fonnance in mess...
This work provides a systematic study of the impact of commu-nication performance on parallel applic...
We demonstrate the profound effects of contention on the performance of page-based software distribu...
In this research the various issues that arise in the design and implementation of distributed shar...
Multi-core multi-socket distributed shared-memory com- puters (DSM computers, for short) have become...
Analytical models were developed and simulations of memory latency were performed for Uniform Memory...
Abstract Distributed shared memory (DSM) machines can be characterized by four parameters, based on ...
: Many research results in recent years have focused on the design of distributed shared memory (DSM...
The goal of this paper is to gain insight into the relative performance of communication mechanisms ...
Abstract—This paper studies the isolated and combined effects of several latency-tolerance technique...
Link to published version: http://ieeexplore.ieee.org/iel3/4807/13287/00604674.pdf?tp=&arnumber=6046...
Recent technological advances have produced network interfaces that provide users with very low-late...
Broadcast-based DSM multiprocessors are nowadays an attractive platform for parallel computing due t...
9th International Conference on Electronics Computer and Computation (ICECCO 2012) -- NOV 01-03, 201...
grantor: University of TorontoLarge communication latency is a key obstacle to achieving h...
Abstract Communications overhead is one of the most important factors affecting per-fonnance in mess...
This work provides a systematic study of the impact of commu-nication performance on parallel applic...
We demonstrate the profound effects of contention on the performance of page-based software distribu...
In this research the various issues that arise in the design and implementation of distributed shar...
Multi-core multi-socket distributed shared-memory com- puters (DSM computers, for short) have become...
Analytical models were developed and simulations of memory latency were performed for Uniform Memory...