Dynamic Embedded Memories (

) Derrick Chen kuang@ai.mit.edu NE43-770 MIT Artificial Intelligence Laboratory 545 Technology Square, Cambridge, MA 02139 April 30, 1995 Motivated by the consumer electronics market, a great body of research has been accomplished to date contributing to our understanding of large-scale memory architectures. In comparison, with the exception of cache designs, little work has been publicized covering small-scale memories. The rapid growth of the FPGA market over the past decade, however, has created new incentives for better understanding the properties of embedded memories. These memories are the core elements which make reconfigurable logic possible. Embedded memories are not simply scaled-down versions of megabit architectures; on the contrary, they need to be designed to satisfy a different set of requirements. Because of their tight integration with logic elements on the same die, embedded memories are likely to be clocked and multi-ported for rapid, parallel access to stored info..